1. Field of the Invention
The invention relates in general to a liquid crystal display and a shift register unit thereof, and more particularly to a liquid crystal display and a shift register unit thereof capable of improving operating frequency.
2. Description of the Related Art
In order to reduce the manufacturing cost of a-Si liquid crystal display, the chip on glass (COG) technology is provided and used in the semi-conductor industry. According to the COG technology, the driving circuits such as the scan driver or the data driver are disposed on an
a-Si display panel so as to simplify the manufacturing process of a-Si liquid crystal display and further bring the manufacturing cost down.
Referring to FIG. 1, a schematic diagram of a conventional a-Si liquid crystal display is shown. The conventional a-Si liquid crystal display 10 includes a scan driver 110, a scan signal line 120, a data driver 130, a data line 140, and a display panel 150. The display panel 150 includes a pixel 152. The scan driver 110 and the data driver 130 are disposed on the display panel 150 with the COG technology.
The scan driver 110 is coupled to a power voltage Vss. The scan driver 110 sequentially outputs a scan driving signal Sscan(n) according to a starting signal ST, a clock signal CK, and a clock signal XCK, where n is a positive integer. The scan driving signal Sscan(n) sequentially activates the pixel 152 in each row via the scan signal line 120. The data driver 130 inputs an image data to the pixel 152 via the data line 140 to generate a corresponding display frame.
Referring to FIG. 2, a schematic diagram of a scan driver is shown. Furthermore, the scan driver 110 includes a number of shift register units 112. Each shift register unit 112 is coupled to the power voltage Vss. The first level shift register unit 112 outputs a scan driving signal Sscan(1) according to a starting signal ST, a clock signal CK and a clock signal XCK. The second level shift register unit 112 outputs a scan driving signal Sscan(2) according to the scan driving signal Sscan(1), the clock signal CK and the clock signal XCK. Likewise, each level shift register unit 112 sequentially outputs a corresponding scan driving signal Sscan(n).
Referring to FIG. 3, a schematic diagram of a clock signal is shown. The duty cycle of the clock signal CK and the duty cycle of the clock signal XCK are 50%. The clock signal CK and the clock signal XCK can not at enabled level or non-enabled level at the same time.
The shift register unit 112 is made from a-Si thin film transistors. Since the a-Si thin film transistors have low mobilityso that the operating frequency of the scan driver 110 is restricted, thus a correct scan driving signal can not be outputted.
Referring to FIG. 4, a timing diagram of a conventional the scan driving signal is shown. Since the a-Si thin film transistor has low mobility, when the scan driver 110 is applied in a high-resolution liquid crystal display, the scan driver 110 is unable to output a correct scan driving signal.
For example, when the starting time of the scan signal line 120 is 5 us, the scan driver 110 still generates a scan driving signal beyond the starting time, causing error to the liquid crystal display and affecting the quality of display frame.
Besides, the shift register unit 112 occupies a large area and is difficult to be disposed, thus making the design of the circuit layout more difficult.